The present invention relates to a signal processing technique, and a disk device such as a magnetic disk drive or a magneto-optic disk device, or more in particular to a data sync signal detection technique and a disk device using a data sync signal detection technique with an improved data sync signal detection rate in which the data sync signal can be detected even in the presence of a data discrimination error in the data sync signal field of the data read from the disk device and discriminated.
FIG. 20 shows an example of the recording format for a magnetic disk drive. The data includes an ID field and a DATA field for each sector providing a unit storage area. The ID field and the DATA field each include a PLO (Phase Locked Oscillator) SYNC field 91 for pull-in of a PLL (phase locked loop), a data sync signal 92 for detecting the starting position of an ID (address information) or data for producing a demodulation timing signal of a modulated code, an ID field for recording/reproducing the ID information or a DATA field 93 for recording/reproducing the data actually, and a CRC field or an ECC field 94 for error detection and correction. Also, there is a GAP field 95 providing a pattern for absorbing various delay time between the ID field and the DATA field or between sectors.
It is well known that accurate detection of the data sync signal 92 is very important for the subsequent code demodulation of the ID or DATA field 93. In other words, even in the case where the decode data in the ID or DATA field 93 has a very satisfactory error rate, a detection error of the data sync signal 92 which is normally about several bytes causes inaccurate code demodulation of the ID or DATA field 93 of several tens to several hundred bytes.
A method using a pattern having no continuous data inversion as a data sync signal is disclosed in JP20 A-8-096312.
In the method disclosed in USP. 5,844,920, there are provided patterns (marks) for data synchronization at two points, between which a gap (no data) or data are filled. In the case where such a gap is filled with data and the data sync detection is effected by the second data sync pattern, the data between the data sync patterns is restored by correcting an erasure pointer for the data error correction code. The provision of data sync patterns at two points makes possible data sync detection even in the case a thermal asperity (TA) occurs in the data sync pattern field.
Further, in order to improve the reproduction performance, there has been proposed a MTR (Maximum Transition Run) code in which the number of continuous magnetization inversions is limited, according to the reference “Maximum Transition Run Codes for Data Storage Systems”, IEEE. Trans. Mag. Vol. 32, No. 5, September 1996, written by J. Moon and B. Brickner.
In a method of data sync detection for a signal processing apparatus having a configuration as shown in FIG. 21, input data 511 are discriminated by a data discriminator 501, and a data discrimination output 512 is subjected to a predetermined post-code processing (bit operation) in a post-coder 502. In the post-code processing, the processing corresponding to the pre-code processing at the time of recording not shown is performed. This is in order to assure correspondence between the data coding at the time of recording and the decoding at the time of reproduction. According to the method disclosed in JP-A-9-223365, it is possible to perform the processing equivalent to the post-code processing at the time of outputting the result of the state transition in the data discriminator 501. Therefore, the post coder 502 is not always necessary as an independent component element. Nevertheless, the method of JP-A-9-223365 is also considered to functionally include an independent post coder 502 having the post-coding operation separated from the data discriminator, or a post-code processing means for simply passing through the code from the data discriminator. The post-code output 513 is applied to a decoder 504. Also, the same post-code output 513 is applied to a data sync signal detector 503 and compared with a predetermined sync pattern 514. When they coincide with each other, a data sync signal 92 is detected, and applied to the decoder 504 as a sync signal detection output 516. With this signal as a decode timing signal, the decoder 504 performs the decode operation thereby to produce an output data 517.
The data sync signal detector 503 is so configured, as disclosed in U.S. patent application Ser. No. 08/948,942, that the data-discriminated code string is divided into groups of a bit string of odd numbered bits and a bit string of even numbered bits, and each group is compared with a sync pattern for coincidence. In the case where the number of coincident groups exceeds a predetermined threshold value 515, it is determined that a data sync signal has been detected. This data sync signal detection processing can exhibit a high ability of data sync signal detection.
On the other hand, the MTR code described above is the code in which the recording data is inverted by 1. When using such a code, the pre-code processing is the (1/(1+D)) processing (an input value and an output value delayed by a predetermined time are added in modulo 2 as an output value). The corresponding post-coding process is the (1+D) processing (an input value and an input value delayed by a predetermined time are added in modulo 2 as an output value). The use of the MTR code improves the data reproduction performance and shortens the error length. Even in the case where the error in the data discriminator 501 is one bit, however, it presents itself as an error of two continuous bits after the (1+D) processing of the post-coder 502. The data sync signal cannot be successfully detected, therefore, even when a code string is divided into a bit string of odd numbered bits and a bit string of even numbered bits.
In the case where a one-bit data error of the data sync signal 92 occurs in the configuration shown in FIG. 21, therefore, the data sync signal is detected erroneously, followed by the ID and DATA fields 93 all erroneous. (If a permanent bit drop-off in the data sync signal unit occurs due to a defect of the medium, etc. data for one sector cannot be correctly reproduced.)
As described above, an erroneous detection (detection not at right position or detection at an erroneous position) of the data sync signal at the head of data causes not merely the erroneous detection of the data sync signal but also all the subsequent decode processing of several hundred bytes become erroneous, resulting in the technical problem that the error rate of the whole apparatus is considerably deteriorated.